Shopping Cart

Free Shipping on Orders over $35!

Designing Reliable and Efficient Networks on Chips (Lecture Notes in Electrical Engineering)

Designing Reliable and Efficient Networks on Chips (Lecture Notes in Electrical Engineering)

Regular price $179.78 Sale price

Compare at $189.00

  • ISBN-13: 9789048182008
  • Publisher: Springer
  • Release Date: Oct 28, 2010
  • Edition: Softcover reprint of hardcover 1st ed. 2009
  • Pages: 198 pages
  • Dimensions: 0.47 x 9.25 x 6.1 inches

Overview

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. With technology scaling, as the geometries of on-chip devices reach the physical limits of operation, another important design challenge for NoCs will be to provide dynamic (run-time) support against permanent and intermittent faults that can occur in the system. The purpose of Designing Reliable and Efficient Networks on Chips is to provide state-of-the-art methods to solve some of the most important and time-intensive problems encountered during NoC design.

Customer Reviews


We Also Recommend